Balloon 3 FPGA board RUN_SPARTAN modification
This modification is required to allow OpenOCD to be used with early FPGA-build Balloon 3 boards with the standard Balloon 3 JTAG adapter. On these boards, the RUN_SPARTAN signal, which controls power to the FPGA, is not forced high during JTAG operations so there's a strong risk that power to the FPGA will switch off, thus breaking the JTAG chain. The problem is solved on later boards by the addition of R56 which links PLD_PORT_EN to RUN_SPARTAN.
The modification is to link PLD_PORT_EN from the upper end of R42 to RUN_SPARTAN on pins 3 and 4 of U28 via a 100R resistor or similar. A photo is shown below.
This is a slightly easier to solder mod that achieves the same thing:
